搜索资源列表
pwm
- PWM Verilog HDL原码和底层C驱动,即测试程序,可直接使用
PWM
- 自己写的一个pwm模块,verilog的,是用于无刷电机控制的。
PWM
- Core_PWM,verilog语言编写,可用于电机驱动
transfer
- 基于CPLD的PWM波形的发生器,编程语言为verilog,开发环境为QuartusII.-The CPLD-based PWM waveform generator, the programming language to verilog, development environment for QuartusII.
PWM_VerilogHDL
- altera公司网站上的详细的PWM设计的Verilog hdl源程序,大多数都采用这个-altera company' s Web site the detailed design of the PWM source Verilog hdl, most have adopted this
audio_up8sample
- verilog代码。利用音频信号上采样8倍,然后对audio做pwm调制。-verilog code.upsample audio date 8 times and output pwm of audio.
PWM
- 用VERILOG语言编写的PWM驱动电机的实验,可控制绝大部分实验箱上的步进电机-PWM DRIVER
PWM_LED
- 利用PWM控制LED亮灭的verilog程序,开发环境quartusII7.0-Using PWM control of LED light off a verilog program development environment quartusII7.0
MCU_V_PWM_16bit
- 单片机通过总线,将占空比和频率送到CPLD/FPGA中,并控制PWM输出.采用Verilog HDL语言编写。-Microcontroller by bus, the duty cycle and frequency sent to the CPLD/FPGA in, and control the PWM output. Using Verilog HDL language.
pwm
- PWM脉冲产生代码,程序采用VHDL硬件描述语言!很有参考价值-PWM pulse generation code, the program using VHDL hardware descr iption language! Useful reference
PWM_DA
- 可以产生PWM波形文件 ,熟悉基于FPGA的开发流程 自己写的程序-PWM waveform files can be generated, FPGA-based development process familiar to write their own programs
VerilogHDLPWM
- Verilog HDL编写的PWM,已运行-PWM Verilog HDL prepared
pwm
- 适合初学者对PWM调制的学习,解释比较明确,由于来元于核心程序,功能强大-Enables the keyboard scan code in Verilog source code, clear for beginners Comments
EDA
- verilog 练习的 基本程序 流水灯 ,PWM ,按键消抖,等基本程序 ,经过 一一验证-practice the basic procedures verilog water lights, PWM, key debounce, and other basic procedures, after only verify
PWM
- 程序PWM_rate1可以输出占空比可调的方波,并把占空比用数码管显示出来。-verilog pwm
PWM
- 在verilog开发环境下针对pwm信号的占空比的调节的编写调试!-In the development environment for verilog pwm signal duty cycle regulated write debugging!
PWM
- 自己编写的verilog语言 PWM实现的一种方法希望有用-verilog PWM
PWM
- 通过设置时钟实现脉冲宽度调制的verilog代码及测试(By setting the clock to achieve pulse width modulation of the Verilog code and test)
测pwm波占空比
- 基于Verilog的接受pwm波并且测量pwm波占空比(Measuring the duty cycle of PWM wave)
pwm with tb final
- pwm with testbench in verilog ,synthesizable